1. Field of Invention
The present invention relates to semiconductor light emitting devices including integrated electronic components.
2. Description of Related Art
Semiconductor light-emitting devices including light emitting diodes (LEDs), resonant cavity light emitting diodes (RCLEDs), vertical cavity laser diodes (VCSELs), and edge emitting lasers are among the most efficient light sources currently available. Materials systems currently of interest in the manufacture of high-brightness light emitting devices capable of operation across the visible spectrum include Group III-V semiconductors, particularly binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen, also referred to as III-nitride materials. Typically, III-nitride light emitting devices are fabricated by epitaxially growing a stack of semiconductor layers of different compositions and dopant concentrations on a sapphire, silicon carbide, III-nitride, or other suitable substrate by metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or other epitaxial techniques. The stack often includes one or more n-type layers doped with, for example, Si, formed over the substrate, a light emitting or active region formed over the n-type layer or layers, and one or more p-type layers doped with, for example, Mg, formed over the active region. III-nitride devices formed on conductive substrates may have the p- and n-contacts formed on opposite sides of the device. Often, III-nitride devices are fabricated on insulating substrates, such as sapphire, with both contacts on the same side of the device. Such devices are mounted so light is extracted either through the contacts (known as an epitaxy-up device) or through a surface of the device opposite the contacts (known as a flip chip device).
Light emitting devices are sensitive to electrostatic discharge. FIG. 1 illustrates a prior art III-nitride device mounted on a silicon diode element that includes an electrostatic discharge protection circuit, described in more detail in FIG. 13 and column 19 lines 29-64 of U.S. Pat. No. 6,333,522. GaN LED element 1 is mounted on leadframes 13a and 13b with a Si diode element 2 having p-side and n-side electrodes interposed therebetween, not directly on the leadframes. The Si diode element 2 with the main surface thereof facing upward and with the back face thereof facing downward is disposed on a die pad forming the tip of the leadframe 13a having a reflecting mirror. The Si diode element 2 is die-bonded to the die pad with an Ag paste 14, while having an n-side electrode 9 on the back face thereof in contact with the die pad of the leadframe 13a. A p-side electrode 7, an n-side electrode 8, and a bonding pad portion 10 of the p-side electrode are provided on the top face of the Si diode element 2. The GaN LED element 1 having the top face of the sapphire substrate facing downward and the p-side and n-side electrodes 5 and 6 facing downward is positioned above the Si diode element 2. The p-side and n-side electrodes 5 and 6 of the GaN LED element 1 are electrically connected to the n-side and p-side electrodes 8 and 7 of the Si diode element 2 via Au microbump 12 and 11, respectively. The GaN LED element 1 is fixed to the Si diode element 2 with a UV curable insulating resin 16. The mechanical connection between the GaN LED element 1 and the Si diode element 2 may be accomplished by welding the microbumps 11 and 12 instead of using the UV, curable insulating resin 16. The bonding pad portion 10 of the p-side electrode of the Si diode element 2 is connected by wire bonding to the lead frame 13b via an Au wire 17. A reflector 15 for upwardly reflecting light is attached to a side face of the die pad of the leadframe 13a, whereby the GaN LED element 1 is surrounded. The tip portions of the leadframes 13a and 13b are entirely molded with a transparent epoxy resin 18 with the GaN LED element 1 and the Si diode element 2 mounted thereon to constitute the LED lamp.
Other circuit elements besides electrostatic discharge protection circuitry may be included in the silicon diode illustrated in FIG. 1. One drawback to the device illustrated in FIG. 1 is the external silicon structure on which LED element 1 is mounted limits the flexibility of the design of the LED element and the package. Also, the external silicon structure may undesirably increase the source size of the light source provided by LED element 1, potentially complicating the design and increasing the cost of optics such as lenses used with the device shown in FIG. 1.
An alternative design of an electrostatic discharge protection structure is shown in FIG. 17 and column 23 lines 1942 of U.S. Pat. No. 6,333,522. FIG. 17 is reproduced here as FIG. 2, which illustrates a GaN LED element 1 with a double heterostructure comprising a GaN buffer layer 31, an n-type GaN layer 32, an InGaN active layer 33, a p-type AlGaN layer 34, and a p-type GaN layer 35 which are stacked sequentially in layers on the top face of a sapphire substrate 30. The top face of the n-type GaN layer 32 has a stepped configuration consisting of an upper-level portion occupying the major part of the top face and a lower-level portion occupying the remaining minor part thereof. An n-side electrode 6 made of a Ti/Au multi-layer film and a Ni/Au multilayer film laminated thereon is formed in stacking relation on the top face of the lower-level portion of the n-type GaN layer 32. The aforesaid InGaN active layer 33, p-type AlGaN layer 34, and p-type GaN layer 35 are stacked sequentially in layers on the top face of the upper-level portion of the n-type GaN layer 32. A p-side electrode 5 made of Ni and Au is disposed directly on the top face of the p-type GaN layer 35 with no intervention of a transparent electrode for current diffusion. See U.S. Pat. No. 6,333,522, column 12 lines 22-40.
An interlayer insulating film 51 made of a silicon oxide film is formed on the GaN LED element 1. In the silicon thin film, a p-type semiconductor region 52 and an n-type semiconductor region 53 are formed. The silicon thin film can be formed easily by utilizing TFT formation technology associated with a liquid-crystal device. The diode element 50 is provided with a p-side electrode 54 filling in a through hole formed in the interlayer insulating film 51 to be connected to the n-side electrode 6 of the GaN LED element 1, while being connected to the p-type semiconductor region 52 thereof. The diode element 50 is also provided with an n-side electrode 55 filling in a though hole formed in the interlayer insulating film 51 to be connected to the p-side electrode 5 of the GaN LED element 1, while being connected to the n-type semiconductor region 53 thereof. The p-side and n-side electrodes 54 and 55 of the diode element 50 are connected to leadframes by wire bonding. In this case, light generated by the GaN LED element 1 is reflected by the leadframes and emitted upward. However, since the diode element 50 can be formed in a narrow limited region, desired light-emitting efficiency can easily be achieved. See U.S. Pat. No. 6,333,522, column 23 lines 1942.
The small size of the electrostatic discharge protection diode in the device of FIG. 2 limits its ability to protect the LED element from electrostatic discharge.